  Seeking Info on VAX hardware bus? 
 The Question is:
 
I am looking for a detailed description of the VAX/VMS bus structure.  How
this particular bus handles instructions, data and inter-module
communications, as well as a description of the interrupt features of the
bus would be appreciated.
 
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&lt;P&gt;&lt;FONT SIZE=3D2&gt;-----Original Message-----&lt;/FONT&gt;
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&lt;BR&gt;&lt;FONT SIZE=3D2&gt;Name: Jeffrey W. Hall&lt;/FONT&gt;
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&lt;BR&gt;&lt;FONT SIZE=3D2&gt;CPU Architecture: VAX&lt;/FONT&gt;
&lt;BR&gt;&lt;FONT SIZE=3D2&gt;Version: V 7.2&lt;/FONT&gt;
&lt;BR&gt;&lt;FONT SIZE=3D2&gt;Questions:&lt;/FONT&gt;
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&lt;P&gt;&lt;FONT SIZE=3D2&gt;I am looking for a detailed description of the =
VAX/VMS bus structure.&amp;nbsp; How this particular bus handles =
instructions, data and inter-module communications, as well as a =
description of the interrupt features of the bus would be =
appreciated.&lt;/FONT&gt;&lt;/P&gt;
 
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 The Answer is:
 
  OpenVMS (the current name for "VMS") does not have nor require a
  specific hardware bus structure.
 
  VAX systems -- there are a large number of different models -- each
  have a system bus of some sort, and can have one or more I/O buses.
  The particular bus configuration is specific to the particular model
  of VAX, and sometimes to the individual host hardware configuration.
 
  If you are interested in creating a module, you will need to indicate
  which particular bus is of interest.
 
  Technical publications on older buses -- particularly the UNIBUS and
  Q-bus -- were made widely available many years ago.  This information
  will be somewhat more difficult to acquire at present.
 
  For an introduction to some of this material, see the older (and since
  retired) OpenVMS Device Driver documentation.  These manuals were part
  of the documentation set for older OpenVMS systems.
 
