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>>>>>>Intel(R) Server Board S5000PAL and S5000XAL<<<<<< 
INTEL Enterprise Products and Services Division
2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA

This package contins the following updates for the Intel(R) Server Board S5000PAL
 BIOS:  R0070
 BMC:      56
 FRUSDR: FAL_40


This package may be used with Intel(R) Deployment Assistant or Intel(R) One-boot 
Flash Update (OFU) utility. 

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                           BIOS COMPONENTS/CONTENTS
================================================================================

Build Stamp : S5000.86B.05.00.0070.11172006
Build Date  : November 17, 2006

Processors supported: 
  Dual-Core Intel(R) Xeon(R) Processor 5000 series w/ 533MHz/667MHz/1066MHz FSB
  Dual-Core Intel(R) Xeon(R) Processor 5100 series w/ 1066MHz/1333MHz FSB
  Quad-Core Intel(R) Xeon(R) Processor 5300 series w/ 1066Mhz/1333Mhz FSB

Microcode update versions:
CPUID   Version Status  
0F64h   02      Production	06F4h   26      Beta
0F65h   08      Production	06F5h   33      Beta
06F6h   44      Production   	06F7h   60      Production 06F9h   82      Beta      (Dual-Core )
06F9h   84      Beta      (Quad-Core )

On-Board Component Option ROM Versions:
ATI RN50 VGA    	: BK-ATI YJ20234a VER008.005.023.000
PXE Ver.        	: Intel(R) Boot Agent GE v1.2.40
ESB2 Option ROM 	: vA.01.10241435I
ESB2 AHCI Option ROM	: iSrc 1.08 09252006

NOTE:  Dual-Core Intel(R) Xeon(R) Processor 5100 series DO NOT support HyperThreading.
       The OS will only show 2 CPU threads per physical processor installed.
NOTE:  BIOS Setup shows the number of physical processors installed and not the
       number of processor cores. For example, when 2 Dual-Core Intel(R) Xeon(R)
       Processor 5100 series are installed, BIOS POST and Setup will only show 2 proc

                            KNOWN BIOS ISSUES/WORKAROUNDS
================================================================================

-When two Dual-Core Intel(R) Xeon(R) 5100 series processors are installed,
 an NMI error may appear during POST after updating from BIOS R0054 or earlier
 to later BIOS releases due to a change in error handling. Perform a full DC power cycle
 (front panel power off and power on) to prevent this message from appearing again.

-As of BIOS R0063, user may encounter a system reset upon first boot if previous
 NVRAM corruption has been found.
-Video mode is set to 80x25 until BIOS defaults are loaded
-PAE mode and the equivalent Linux mode must be set to see greater than 2.5GB of memory.
-ESB NIC disable option in BIOS setup has been removed. 

NOTE:  Dual-Core Intel(R) Xeon(R) Processor 5100 series DO NOT support HyperThreading.
       The OS will only show 2 CPU threads per physical processor installed.
NOTE:  BIOS Setup shows the number of physical processors installed and not the
       number of processor cores. For example, when 2 Dual-Core Intel(R) Xeon(R)
       Processor 5100 series are installed, BIOS POST and Setup will only show 2 processors. 

                              BIOS Changes since R066
================================================================================
Fixed:
- Get system Restart cause may return incorrect response 
- Add-in cards not getting set up in PCIe* slot 4
- System has no beep code after two processors with mismatched FSB's are installed.
- Failing DIMM (2A) causes DIMM 1A to be marked bad / hang system.
- Failing DIMM 2A not logged in SEL.
- [F12] support for PXE boot.
- USB detection when Console Redirection is enabled.
- Boot Failure message sometimes when Console Redir is enabled.
- Patrol Scrubbing not enabled.
- PEX_FAT_FERR: ESI Reset Time-Out.
- SPMICmd_SetProcessorTControl command is not sent for processor 2 
- RTC fails century rollover.
- PERR enable bit not preserved in PCICMD register of SATA controller.

Added:
- Implement common PlatformIdentify support to read and publish Platform SKU ID.
- Support for IPMI Get System Boot Options and Set Serial MUX commands 
- Update to Intel(R) 5000 Series Chipset Memory Reference Code v1.21 patch.
- Support for IPMI Set Processor TControl command.
- PCI-E Swizzle support for future platform porting.
- Enable Patrol Scrubbing for Intel(R) 5000 Series Chipset G1 stepping and later.
- Update to latest EPCS (EFI Platform Configuration Script) Utilities.
- Improved code flow for hiding COM port from OS in the case of SOL or LOSR.
- Server Management Optimization support changes.
- Rolling BIOS fix for rare infinite resets.
- Map out Electrically Isolated DIMMs on Truncated Channels.
- Enhancements for Optimization of Maximum Read Request Sizes of PCI-e Devices.
- Support AMI BIOS Configuration Program (BCP) v2.6 .
- Setup option for "FSB High Bandwidth Optimization".

=============================================================================
                              ABOUT THIS BMC RELEASE
=============================================================================
REVISION INFORMATION RETURNED BY GET DEVICE ID COMMAND:
Operational code:       v00.56
Boot code:              v0B.41
PIA data:               v00.03
Manufacturer ID:        0x000157 (Intel)
Product ID:                 0x0028   (Alcolu)

Checksum Information: Operational Code
  Region:                0x00020000 -> 0x0012ab76
  Checksum (HEX File):             0xe668
Boot Block
  Region:               0x00000000 -> 0x0000557e
  Checksum (HEX file):             0x1b37


         BMC Features/Changes and  Known Issues 
=============================================================================
PECI Support added.
Serial/Modem interface is defeatured for all current generation platform.
Added support for email alerts VIA ESB2/BMC
Deasserted sel event for chassis intrusion.
System will automatically boot up with RJ45-RS232 convert and RS232 Loopback.

Fixed:
- BIOS not responding to BMC SetSystemBootOption command (5100 series)
- BMC responds as S0/G0 working when Get ACPI Status is executed before DC is on
- After shutdown, system will auto-reboot when comport 2 is connected to loopback
- System will automatically boot up with RJ45-RS232 convert and RS232 Loopback.
- TPT module is not including FML Header/FML Status/TPT Status as part of read buffer 
- Switching Serial MUX from System to TMODE truncates "[TMODE OK] message  
- TMode will not maintain connection in standby

=============================================================================
FRUSDRs
=============================================================================
Requirements:
BMC Firmware - BMC55 or Later
System BIOS - R66 or Later

=============================================================================
Known Issues
=============================================================================
The I2C address for the PS0 (upper PowerSupply slot) FRU at A0h conflicts with the
   AT24C64 EEPROM on the server board. The AT24C64 EEPROM is used by the BMC for 
   both FRU and private store information. Remove the upper PS slot as a 
   workaround for this issue. Use only the bottom power supply with this BMC 
   release.

================================================================================
SAS Backplane Hot Swap Controller Updates are only available as a separate package a this time. 
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                           LEGAL INFORMATION
================================================================================

Information in this document is provided in connection with Intel Products
and for the purpose of supporting Intel developed server boards and systems.
No license, express or implied, by estoppel or otherwise, to any intellectual 
property rights is granted by this document. Except as provided in Intel's 
Terms and Conditions of Sale for such products, Intel assumes no liability 
whatsoever, and Intel disclaims any express or implied warranty, relating to 
sale and/or use of Intel products including liability or warranties relating 
to fitness for a particular purpose, merchantability, or infringement of any 
patent, copyright or other intellectual property right. Intel Corporation 
may have patents or pending patent applications, trademarks, copyrights, or
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The furnishing of documents and other materials and information does not 
provide any license, express or implied, by estoppel or otherwise, to any such
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sustaining applications. Intel may make changes to specifications and product
descriptions at any time, without notice.

Intel is a registered trademark of Intel Corporation. 

*Other names and brands are the property of their respective owners.

Copyright (C) 2006 Intel Corporation.

[END OF RELEASE NOTES]
