=============================================================================
    Intel(R) Server Platform BluffCreek FRU/SDR Update Release Notes
=============================================================================

INTEL Enterprise Platform & Services Marketing
Intel Corporation
2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA

=============================================================================

DATE:		April 27, 2010

TO:		Intel(R) Server Platform BluffCreek customers

SUBJECT:	IBMC(R) FRU/SDR update package FBC_21 release notes

=============================================================================
                               LEGAL INFORMATION
=============================================================================
Information in this document is provided in connection with Intel products. 
No license, express or implied, by estoppel or otherwise, to any intellectual 
property rights is granted by this document. Except as provided in Intel's 
Terms and Conditions of Sale for such products, Intel assumes no liability 
whatsoever, and Intel disclaims any express or implied warranty, relating to 
sale and/or use of Intel products including liability or warranties relating 
to fitness for a particular purpose, merchantability, or infringement of any 
patent, copyright or other intellectual property right. Intel Corporation may 
have patents or pending patent applications, trademarks, copyrights, or other 
intellectual property rights that relate to the presented subject matter.  
The furnishing of documents and other materials and information does not 
provide any license, express or implied, by estoppel or otherwise, to any 
such patents, trademarks, copyrights, or other intellectual property rights.  
Intel products are not intended for use in medical, life saving, or life 
sustaining applications. Intel may make changes to specifications and product 
descriptions at any time, without notice.

Intel is a registered trademark of Intel Corporation. 

*Other names and brands are the property of their respective owners.

Copyright (c) 2009-2010 Intel Corporation.

=============================================================================
                              ABOUT THIS RELEASE
=============================================================================

SDR file version:			0.21
Baseboard FRU file version:		0.02
Master configuration file version:	0.21
FRUSDR loader version:                  2.0.1 Build 14

SDR data based on system/thermal team SDR spreadsheet rev 2.2

=============================================================================
	     SYSTEM HARDWARE & SOFTWARE REQUIREMENTS/REVISIONS
=============================================================================

- This FRU/SDR package has only been tested on BluffCreek FAB4 baseboards.

- BMC 00.49 or later and a BIOS supporting LV-DDR3 DIMM detection MUST be preinstalled prior to installing this FRU/SDR package if the user wants functional DIMM voltage sensors.


=============================================================================
                      IMPORTANT INSTALLATION NOTES
=============================================================================

- Please ensure that required BMC FW and BIOS versions are preinstalled or the DIMM voltage sensors will not work correctly. 

=============================================================================
			INSTALLATION PROCEDURE
=============================================================================

1. Ensure BMC release 00.50 or later is pre-installed before attempting this
   FRU/SDR update.

2. Copy all of the files in the FBC_21.zip archive to a USB key,
   hard disk drive or floppy drive.
   All of the files in this zip archive must reside in the same directory.

3. Boot to EFI and then execute the following script to bring up the main
    FRU/SDR load menu:
 
     updFBC.nsh

4. Boot to EFI and then run the following command to display the 
   contents of the baseboard FRU device:

	FRUSDR /d FRU

   If device is empty, which is the case for all new FAB4 baseboards, then
   execute the following command to program the empty FRU device:

	FRUSDR /fru BC_BMC.fru
   
5. Now execute the following command to bring up the main FRU/SDR load menu:

	FRUSDR /cfg master.cfg


6. Select the option which is applicable to what you want to do. On a brand
   new baseboard I would highly recommend to run option 3 to program both
   the FRU and SDR. By reprogramming the FRU you will be given the option
   to input data from the keyboard into various chassis, board and product
   areas. Ensure that you select the correct chassis from the chassis
   selection menu otherwise your fan sensors will not be configured
   properly.

7. If the following message is displayed:
   "This is either the incorrect FRU/SDR package for this baseboard or your
    platform ID is incorrectly programmed."
 
   Then you need to ensure that you are installing this package on a S5500BC
   baseboard and that your platform ID is correctly programmed.
 
8. The package should auto-detect the chassis. If it does not, it will print an
   error message indicating why auto-detection failed and then present
   the standard chassis selection menu.
 
9. Once the package has finished its installation, I would highly recommend
   to DC power off the system and cycle AC power.


=============================================================================
                           KNOWN ISSUES/WORKAROUNDS
=============================================================================

- Some Power-on chassis do not support a 2-wire SMBus front panel temperature
  device so this FRU/SDR package will not install the front panel temperature
  sensor data record. This will be resolved once Alpha chassis hardware becomes
  available which does have support for 2-wire SMBus front panel temperature
  device.

- Processor VRD Hot sensors and CPU status sensors will log events and cause
  the front panel status LED to indicate a fault.
  This is a know issue with the BMC firmware rev 00.05 and will be resolved
  in the BMC 00.06 release.


=============================================================================
                           FEATURES ADDED
=============================================================================
FBC_21 (Gold 7):
- Corrected some errors in three "other" sheets according to the BluffCreek_CONFIG-FSC_V2.1.xls.
- Update other chassis names according to the BluffCreek_CONFIG-FSC_V2.2.xlsm.

FBC_20 (Gold 6):
- Add BIOS POST Error Sensor in BIOS SDR list.
- Update the Tcontrol offset for WSM CPU according the BluffCreek_CONFIG-FSC_2_0.xls.
- Added three additional other profiles (Workstation, Acoustic Server, Performance Server).

FBC_19 (Gold 5):
- Added support for Westmere processors B0 and B1.
- Upgrade FRUSDR loader utility to version 2.0.1 Build 14.
- Modify the copyright date from 2009 to 2009-2010.

FBC_18 (Gold 4):
- Added support for Westmere processors.
- Upgrade FRUSDR loader utility to version 2.0.1 Build 12.
- Add WSM LVDDR support according latest FSC sheet v 1.9 and changed the CPU voltage Init byte to 3E.
- Modify P1/P2 Therm Ctrl % sensors' Maximum Reading with 64h instead of FFh.
- Split clamp record to make each OEM fan speed record should have its own header.
- Modify startup.nsh to updFBC.nsh.

FBC_17 (Gold 3):
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 10 to version 2.0.1 Build 11. 
- Modify the stepwise record temp sensor from front panel sensor(21h) to motherboard sensor(20h) for Other chassis according the BluffCreek_CONFIG-FSC_1_7.xls. 
- Add "Boost Value" and "Sensor Exclusion" sub records according the BluffCreek_CONFIG-FSC_1_7.xls.(Added CCB 550 and CCB 571 support) 
- Remove probing Front Panel Temperature sensor for SR1630BC,SC5650DP and SC5650BRP chassis.
- Modify IOH,MEMA and MEMB sensors' initialization and Min/Max Reading values to fix their reading are 0 Degrees C in EWS issue. 

FBC_16 (Gold 2):
- None

FBC_15 (Gold 1):
- Correct all Entity IDs and Entity Instances. 

FBC_14 (Silver 6):
- Add new button sensor SDR.
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 8 to version 2.0.1 Build 10.
- Revert back the entity ID of front panel temperature sensor to 0x0C.
- Modify the "BB -12.0V" and "BB +5.0V STBY" sensors' scale factor at voltage sensor scaling record according the BluffCreek_CONFIG-FSC_1_5.xls.
- Add the new BIOS Type 3 SDR(Memory Parity Error record).
- Correct record id of all SDR records and make all record ids sequentially from first record.
- Modify the last byte parameters of HJ chassis thermal OLTT profile 7 data SDR.

FBC_13 (Silver 5):
- Modify the copyright date from 2008 to 2009.
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 7 to version 2.0.1 Build 8.
- Remove the "Intel(R) Entry Server Chassis" description for "Other" chassis selection.
- Modify domain 2 and domain 3 minimal and maximum values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_1_2.xls.
- Modify domain 3 boost/failure control values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_1_2.xls.
- Modify domain 1 and domain 2 minimal and maximum values for SR1630BC chassis according the BluffCreek_CONFIG-FSC_1_2.xls.
- Modify thermal margin sensors and fan sensors OEM byte to support sensor filter interface.
- Add and modify some domain values for other chassis according the BluffCreek_CONFIG-FSC_1_3.xls.
- Modify the domain 3 max PWM and failure/boost control values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_1_4.xls.
- Modify the domain 0 failure/boost control values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_1_4.xls.
- Correct some Entity IDs and Entity Instances.  
- Modify the "BB -12.0V" and "BB +5.0V STBY" threshold values according the BluffCreek_CONFIG-FSC_1_5.xls.
- Modify SC5650BRP chassis domain 3 max PWM and failure/boost values to fix PP5BRP potential thermal issue according the BluffCreek_CONFIG-FSC_1_5.xls.
- Modify domain 0 max PWM values for Other chassis according the BluffCreek_CONFIG-FSC_1_5.xls.
- Modify IOH,MEMA and MEMB sensors' LSB&MSB and T-ctrl offset values for Other chassis according the BluffCreek_CONFIG-FSC_1_5.xls.

FBC_12 (Silver 4):
- Modify the version number in Master.cfg.
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 6 to version 2.0.1 Build 7.
- Add chassis type query for other chassis selection when updating chassis FRU. 
- Modify Other chassis CPUs' T-ctrl offset values according the BluffCreek_CONFIG-FSC_1_1.xls. 
- Modify SC5650DP,SC5650BRP and SR1630BC thermal profile data according the BluffCreek_CONFIG-FSC_1_1.xls.
- Modify SC5650DP and SC5650BRP chassis domain 3 sensor fail control values according the BluffCreek_CONFIG-FSC_1_1.xls.    

FBC_11 (Silver 3):
- Modify Front Panel Temp sensor's Entity ID.
- Modify the ramp contribution and scan rate to new definition LSB Ramp Coefficient and MSB Ramp Coefficient for every clamping record according the BluffCreek_CONFIG-FSC_0_9_9.xls.
- Modify all Domains' normal control value from 25% to 20% for all chassis according the BluffCreek_CONFIG-FSC_0_9_9.xls.
- Modify CPUs' T-ctrl offset to positive offsets according the BluffCreek_CONFIG-FSC_1_0_0.xls.

FBC_10 (Silver 2):
- Modify Baseboard Temp sensor's threshold values according the BluffCreek_CONFIG-FSC_0_9_8.xls.
- Modify SC5650DP,SC5650BRP and SR1630BC CPU, IOH and Memory Tcontrol offset values according the BluffCreek_CONFIG-FSC_0_9_8.xls.
- Modify SC5650DP and SC5650BRP IOH scan rate values according the BluffCreek_CONFIG-FSC_0_9_8.xls.
- Modify domain 2 and domain 3 minimal and maximum values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_0_9_8.xls.
- Modify domain 3 boost and fail values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_0_9_8.xls.
- Add the BIOS QPI error SDR records.
- Modify some display or comment strings in Master.cfg file.
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 5 to version 2.0.1 Build 6.  

FBC_09 (Silver 1):
- Modify user selection fall back logic at the chassis auto detection function. 
- Remove the HSC detection for SR1630BC chassis.
- Modify SC5650DP,SC5650BRP and SR1630BC IOH T-ctrl offset and Negative Hysteresis according the BluffCreek_CONFIG-FSC_0_9_6.xls.
- Modify SC5650DP,SC5650BRP and SR1630BC MEMA & MEMB T-ctrl offset according the BluffCreek_CONFIG-FSC_0_9_6.xls.  
- Modify SC5650DP,SC5650BRP and SR1630BC thermal profile data according the BluffCreek_CONFIG-FSC_0_9_6.xls.
- Modify PWM2's and PWM3's FSC Min stepwise PWM values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_0_9_6.xls.
- Modify MEMA's and MEMB's Positive Hysteresis values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_0_9_7.xls.
- Modify MEMA's and MEMB's scan rate values for SC5650DP and SC5650BRP chassis according the BluffCreek_CONFIG-FSC_0_9_7.xls.
- Separate the FSC clamp records for 1P and 2P to resolve the FSC can't work when installing one CPU.

FBC_08 (Beta 2):
- Modify the IOH Therm Margin sensor's M value.
- Modify the 0x66, 0x67, 0x68, 0x69, and 0x6A sensors all to manual rearm.
- Add user selection fall back messages for the chassis auto detection function.
- Modify some fans' minimal speed according the BluffCreek_CONFIG-FSC_0_9_2.xls.
- Modify the SC5650DP's and SC5650BRP's PWM3 "Boost Control Value" and "Temp Sensor Fail Ctrl Val" values according the BluffCreek_CONFIG-FSC_0_9_2.xls.
- Modify all PWMs' Sleep Control Value and S1 Sleep State Support Value according the BluffCreek_CONFIG-FSC_0_9_2.xls.
- Modify the PS1 Input Power(#52)'s and PS2 Input Power(#53)'s threshold values according the BluffCreek_CONFIG-FSC_0_9_2.xls.  
- Modify the typo error using "up to" instead of "upto" when flashing the FRUSDR. 
- Modify the chassis auto-detection function to fix the FRU fail to update issue when the auto detection is successful.
- Modify the BB +1.8V AUX(#15)'s threshold value according the BluffCreek_CONFIG-FSC_0_9_2.xls. 
- Update SC5650DP,SC5650BRP and SR1630BC PWMs' Negative Hysteresis and Scan Rate according the BluffCreek_CONFIG-FSC_0_9_3.xls to fix fan oscillation issue.
- Update SC5650DP,SC5650BRP and SR1630BC PWMs' IOH T-ctrl offset according the BluffCreek_CONFIG-FSC_0_9_3.xls.
- Update SR1630BC PWM2's CPU2 T-ctrl offset according the BluffCreek_CONFIG-FSC_0_9_3.xls.
- Move chassis manufacturer name field update code to chassis info area in the Master.cfg file.
- Add HSC backplane detection display message. 
- Modify all voltage sensors' scale factor values according the BluffCreek_CONFIG-FSC_0_9_3.xls to follow voltage table v1.4.
- Remove the PS1 present information when the chassis SC5650DP and SR1630BC are detected. 
- Update SC5650DP and SR1630BC scan rate value according spreadsheet V0.94.
- Update SR1630BC PWM Negative Hysteresis according spreadsheet V0.94.
- Update SR1630BC PWM2 CPU2 T-ctrl offset according spreadsheet V0.94.
- Update all ME SDR records as per recent ME FW release (SPS_01.00.05.002.0).
- Add the Power Unit Map OEM SDR.

FBC_07 (Beta 1):
- Remove the display string when the power supply 2 isn't present.
- Add the FAN fault LED OEM SDR for other chassis.
- Add and remove some tags for the FCT and SHIP option, make the FCT's and Shipping's SDR records accord with the FCT combo release.
- Modify the typo error using "minutes" instead of "minute" when flashing the FRUSDR. 
- Make FRUSDR Load Utility can flash FRUSDR package in the Winpe system.
- Modify the sensor(#18)'s name to "BB +3.3V Vbat" according the common EPS 1.02.
- Modify the PS1 Output Current(#54),PS2 Output Current(#55) sensors' unit to %.
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 3 to version 2.0.1 Build 4.
- Modify FSC Min/Max stepwise PWM values for all 3 chassis(PP5DP/BRP, HJ2 and Other chassis) according the BluffCreek_CONFIG-FSC_0_8_8.xls.
- Add Memory Clamping for PP5DP/BRP CPU fans at CLTT mode according the BluffCreek_CONFIG-FSC_0_8_8.xls.
- Update CPU fans' threshold values according the BluffCreek_CONFIG-FSC_0_8_8.xls.
- Modify the ME controller record data,including channel number,LUN,sensor number and so on.
- Add the baseboard detection function.
- Add the BIOS type 03 SDR records for BIOS boot events.
- Modify clamp records for CLTT profile mapping change.
- Modify the MEM's and IOH's threshold values according the BluffCreek_CONFIG-FSC_0_9_0.xls.
- Remove the HSC1 records.
- Modify FSC Min/Max stepwise PWM values for all 3 chassis(PP5DP/BRP, HJ2 and Other chassis) according the BluffCreek_CONFIG-FSC_0_9_1.xls.
- Modify SR1630BC PWM2 Negative Hysteresis to 5C and Tcontrol offset to 10C according the BluffCreek_CONFIG-FSC_0_9_1.xls.
- Open the UC, UNC event capabilities for IOH, MEM1 and MEM2 sensors.
- Modify the HW detecting segment according the FSC table.
- Upgrade the FRUSDR loader utility from version 2.0.1 Build 4 to version 2.0.1 Build 5. 
- Add the chassis auto-detection function.

FBC_05 (Alpha 5):
- Modify the clamp type records' IOH temperature value to '00h'.
- Modify some sensors' name according to the Sensor_SDR.doc.
- Cleaning up Master.cfg file.
- Modify the "Control Event# mode" values to 1 at all Thermal Profile Data records according to FRUSDR table V0.87.
- Add Chassis ID and FAN FRU LED Mapping OEM SDR Records.
- Modify the product name to "S5500BC".

FBC_04 (Alpha 4):
- Remove the display string "FLASHED" when updating SDR.
- Modify the Processor/HSBP/LCP detection code to common code for reducing redundancy code.
- Remove the ask "Is a fan connected to the Processor2 FAN connector?" when the processor 2 is detected on the SC5600DP and SC5650BRP chassis.
- Modify the chassis name to final product code according to the BluffCreek_CONFIG-FSC_0_8_6.xls.
- Modify the Memory OLTT profile at each chassis FSC tab according to the BluffCreek_CONFIG-FSC_0_8_6.xls.
- Modify the PS1 Input Power(#52),PS2 Input Power(#53),PS1 Output Current(#54),PS2 Output Current(#55),PS1 Temperature(#56) and PS2 Temperature(#57) sensors' configurable parameter according to the BluffCreek_CONFIG-FSC_0_8_6.xls.
- Modify the sensor PS1 Output Current(#54) name to "PS1 Curr Out %" and the sensor PS2 Output Current(#55) name to "PS2 Curr Out %" according to the BluffCreek_CONFIG-FSC_0_8_6.xls. 
- Modify some Fan speed values at each FSC tab according to the BluffCreek_CONFIG-FSC_0_8_6.xls. 
- Modify all voltage sensors' threshold values according to the BluffCreek_CONFIG-FSC_0_8_6.xls. 

FBC_03 (Alpha 3):
- Remove the chassis type query when updating FRU.
- Modify the ME controller address to 0x2C.
- Modify the IOH Therm Margin(#22),MEM P1 THRM MRGN(#23) and MEM P2 THRM MRGN(#24) Sensors' Reading Mask & Settable to "0000".

FBC_02 (Alpha 2):
- Add HSC records and auto-detect function.
- Add the FSC records.
- Modify the FRU records according the common EPS 0.61.
- Add "Other Chassis" option in the SDR update menu. 
- Remove all fan presence records for all chassis.
- Modify some sensors' name according the common EPS 0.71.
- Fixed the BB -12.0V sensor event log issue.
- Modify the IOH,MEM A's and B's records. Disable support UNC, UC, LC,LNC events.
- Modify the PS1 Output Current(#54)/PS2 Output Current(#55)’s UNC and UC values.
- Modify the fru file's Part number, serial number etc.. from "000000" to "……" .
- Add the FCT tag for factory test.
- Add the SHIP tag for shipping.
- Add FRUSDR.txt in the package.
- Modify some Sensors' Name according the Urbanna sdr name.
- Modify the BB -12.0V sensor's(#1C) value.
- Add LCP and ME type 12 records.
- Remove associated SDR for all HSC backplane tags other than 6BP and 6BPE.
- Modify the chassis name from "PP5 Base" to "PP5 DP".
- Modify the IOH Therm Margin(#22),MEM P1 THRM MRGN(#23) and MEM P2 THRM MRGN(#24) Sensors' Initialization,Sensor Capabilities,Assertion Event Mask and Deassertion Event Mask values to enable trigger events.
- Add the outbound licenses in the package. 
- Add HSBP support for all the chassis other than HJ2 chassis.
- Modify the display string in the Master.cfg file.
- Add the System Event sensor(#08) record.
- Modify the 'Temp Source' value from 1 to 0 for all non-CPU clamping sensors according the BluffCreek_CONFIG_FSC 0.76 datasheet. 
- Modify the sensor type of PS1 Power In(#52) and PS2 Power In(#53) to '0Bh' and modify the sensor type of PS1 Current Out(#54) and PS2 Current Out(#55) to "03h" according the common EPS 0.91.
- Modify the IOH Therm Margin(#22),MEM P1 THRM MRGN(#23) and MEM P2 THRM MRGN(#24) Sensors' Assertion Event Mask and Deassertion Event Mask values to disable trigger events according the common EPS 0.91.
- Add the BIOS type 03 SDR records.
- Add the FRUSDR loader utility version 2.0.1 Build 3.
- Add the ME Type 03 SDR records.
 
FBC_01 (Alpha 1):
- First release of the BluffCreek FRU/SDR package

=============================================================================
                           ISSUES FIXED
=============================================================================
FBC_21 (Gold 7):
- None.

FBC_20 (Gold 6):
- None.

FBC_19 (Gold 5):
- Tracker #195087: FRUSDR build 13 & FBC _18 : Processor detection fails.

FBC_18 (Gold 4):
- Tracker #195065: Each OEM fan speed record should have its own header.

FBC_17 (Gold 3):
- Tracker #194835: IOH Thermal Margin sensor reading is incorrect in EWS.

FBC_16 (Gold 2):
- QAN7219826:Hawk junction-T FP board wrong temp sensor chip uesd issue
- Tracker #195041: FRUSDR update fail with error message .

FBC_15 (Gold 1):
- None.

FBC_14 (Silver 6):
- None.

FBC_13 (Silver 5):
- None.

FBC_12 (Silver 4):
- Tracker #194952: Version number incorrect in Master.cfg of FBC_11 package.
- Tracker #194928: FRUSDR 2.0.1 Build 6 Utility doesn't ask chassis type when other chassis is selected.

FBC_11 (Silver 3):
- Tracker #194940: Change Tcontrol offset in SDR per the processor thermal guidance.

FBC_10 (Silver 2):
- None

FBC_09 (Silver 1):
- Tracker #194836: Unnecessary querying of HSC for SR1630BC chassis.
- Tracker #194897: DIMM fan can't work when one CPU configuration.

FBC_08 (Beta 2):
- Tracker #194292: Thermal trip occurs before Processor Thermal control sensor triggers upper critical event.
- Tracker #194733: Sensor - IOH Therm Margin sensor reading is always 0C. 
- Tracker #194738: Some sensors are Auto-Rearm when the EPS says that they should be Manual Rearm. 
- Tracker #194753: Upper critical and Upper non-critical threshold values of PS1 Power In and PS2 Power In are 00h.
- Tracker #194761: Sensor status of Power Unit Redundancy is unavailable.
- Tracker #194766: The FRU information is not updated after updating FRUSDR to FBC_07 on one server. 
- Tracker #194767: Typo error when flashing FBC_07.
- Tracker #194768: System status LEDs on 5U BRP do NOT work after AC cycle.
- Tracker #194810: Node Manager Health Event DCh OEM 0 assertion 73h OEM is missing in the FRUSDR_07 package.

FBC_07 (Beta 1):
- Tracker #194080: SDR parameters of Sensor in BluffCreek_CONFIG-FSC_0_6 are not correct.
- Tracker #194279: Fail to get sensor reading for "NM Capabilities".
- Tracker #194302: BMC13 :  Can able to flash Urbanna frusdr on  bluff creek, bluffcreek frusdr on hanlan creek.
- Tracker #194309: FRUSDR 2.0.1 build 3: Winpe FRUSDR is disable to flash FRUSDR 03 and 02 package.
- Tracker #194430: "Power Supply 2 is not present" should not be shown when updating FBC_05 on PP5 DP chassis.
- Tracker #194501: Typo error when flashing FBC_05.
- Tracker #194532: FRUSDR 2.0.1 build 3: Winpe FRUSDR is unable to flash FRUSSDR 03 and 02 packages.
- Tracker #194538: PMBus Current Out Sensors have incorrect units.
- Tracker #194555: The "NM capabilities" sensor in SDR does not match with ME EPS.
- Tracker #194616: Fail to update FRUSDR on board FY88MP0078.
- Tracker #194633: BMC Version 22 when loaded with shipping SDR configuration sensors no#12 and no#14 operation when system only setup one CPU.
- Tracker #194687: Need EPS change for IOH, MEM1 and MEM2 Thermal margin sensor event offset.

FBC_05 (Alpha 5):
- Tracker #193739: SMBIOS Type 2 contains unreasonable information under BIOS R0003.

FBC_04 (Alpha 4):
- Tracker #194332: PMBus Output Current Sensors have misleading names.

FBC_03 (Alpha 3):
- Tracker #193840: The fan speed is always in boost state.
- Tracker #194271: Need to know information for Chassis type query.
- Tracker #194274: Reading Mask & Settable/Readable Threshold Masks need to be set as 0000, not 1B1B for Sensor#22 (IOH Therm Margin sensor).
- Tracker #194279: Fail to get sensor reading for "NM Capabilities".

FBC_02 (Alpha 2):
- Tracker #193675: P1 Status Sensor(#60h)'s sensor type don't match its definition in Thurley Common Core FW EPS V0.5
- Tracker #193809: BB -12.0V(1Ch) and Front Panel Temp(#21h) trigger low non-critical and critical events,and the system status LED is amber blink after power cycle.
- Tracker #193810: The readings for some threshold sensors are unavailable.
- Tracker #193875: Threshold values for BB -12.0V(#1C) Hysteresis overlap. 
- Tracker #193981: The "Sensor Capabilities" of sensor #21h, #23h and #24h don't match with FW EPS.
- Tracker #194043: The name of supported chassis doesn't match FW Common Core EPS 0.71.
- Tracker #194058: Fan presence sensors fail to detect unplugged fans.

FBC_01 (Alpha 1):
- None

=============================================================================
                             REFERENCE MATERIAL
=============================================================================
Common IBMC Firmware EAS 1.0
Common Platform IBMC FW EPS 1.0.12
BluffCreek_CONFIG_FSC 2.2 datasheet 

[END OF RELEASE NOTES]
