- All
- Enhanced
- Extended
- Regular
- 12 bits
- 14 bits
- 16 bits
- by RAM size
- by ROM size
- by EEPROM size

- Features
- Configuration Bits
- RAM map
- SFR map

PIC12HV752
CONFIG (address:0x2007, mask:0xFFFF)
FOSC0 -- FOSC: Oscillator Selection bit
| FOSC0 = INT | 0x3FFE | Internal oscillator mode. I/O function on RA5/CLKIN. |
| FOSC0 = EC | 0x3FFF | EC oscillator mode. CLKIN function on RA5/CLKIN. |
WDTE -- Watchdog Timer Enable bit
| WDTE = OFF | 0x3FF7 | Watchdog Timer disabled. |
| WDTE = ON | 0x3FFF | Watchdog Timer enabled. |
PWRTE -- Power-up Timer Enable bit
| PWRTE = ON | 0x3FEF | Power-up Timer enabled. |
| PWRTE = OFF | 0x3FFF | Power-up Timer disabled. |
MCLRE -- MCLR/VPP Pin Function Select bit
| MCLRE = OFF | 0x3FDF | MCLR pin is alternate function. |
| MCLRE = ON | 0x3FFF | MCLR pin is MCLR function with internal weak pullup. |
CP -- Code Protection bit
| CP = ON | 0x3FBF | Program memory code protection is enabled. |
| CP = OFF | 0x3FFF | Program memory code protection is disabled. |
BOREN -- Brown-out Reset Enable bits
| BOREN = DIS | 0x3CFF | BOR disabled. |
| BOREN = SLEEP_DIS | 0x3EFF | BOR enabled during operation and disabled in Sleep. |
| BOREN = EN | 0x3FFF | BOR enabled. |
WRT -- Flash Program Memory Self Write Enable bit
| WRT = ALL | 0x33FF | 000h to 3FFh self-write protected. |
| WRT = HALF | 0x37FF | 000h to 1FFh self-write protected. |
| WRT = FOURTH | 0x3BFF | 000h to 0FFh self-write protected. |
| WRT = OFF | 0x3FFF | Flash self-write protection off. |
CLKOUTEN -- Clock Out Enable bit
| CLKOUTEN = ON | 0x2FFF | CLKOUT function enabled. CLKOUT pin is CLKOUT. |
| CLKOUTEN = OFF | 0x3FFF | CLKOUT function disabled. CLKOUT pin acts as I/O. |

This page generated automatically by the device-help.pl program (2013-08-01 15:50:26 UTC) from the 8bit_device.info file (rev: 1.14) of mpasmx and from the gputils source package (rev: svn 983:985). The mpasmx is included in the MPLAB X.