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- Extended
- Regular
- 12 bits
- 14 bits
- 16 bits
- by RAM size
- by ROM size
- by EEPROM size

- Features
- Configuration Bits
- RAM map
- SFR map

PIC12C671
CONFIG (address:0x2007, mask:0xFFFF)
FOSC -- Oscillator selection bits
| FOSC = LP | 0x3FF8 | LP oscillator. |
| FOSC = XT | 0x3FF9 | XT oscillator. |
| FOSC = HS | 0x3FFA | HS oscillator. |
| FOSC = INTRCIO | 0x3FFC | INTRC, OSC2 is I/O. |
| FOSC = INTRCCLK | 0x3FFD | INTRC, Clockout on OSC2. |
| FOSC = EXTRCIO | 0x3FFE | EXTRC, OSC2 is I/O. |
| FOSC = EXTRCCLK | 0x3FFF | EXTRC, Clockout on OSC2. |
WDTE -- Watchdog Timer Enable bit
| WDTE = OFF | 0x3FF7 | WDT disabled. |
| WDTE = ON | 0x3FFF | WDT enabled. |
PWRTE -- Power Up Timer
| PWRTE = ON | 0x3FEF | Enabled. |
| PWRTE = OFF | 0x3FFF | Disabled. |
CP -- Code Protection bits
| CP = ALL | 0x009F | All memory is code protected. |
| CP = 75 | 0x15BF | 0200h-03FEh code protected. |
| CP = 50 | 0x2ADF | Do not use. |
| CP = OFF | 0x3FFF | code protection off. |
MCLRE -- Master Clear Enable
| MCLRE = OFF | 0x3F7F | Master Clear disabled. |
| MCLRE = ON | 0x3FFF | Master Clear enabled. |

This page generated automatically by the device-help.pl program (2013-08-01 15:50:26 UTC) from the 8bit_device.info file (rev: 1.14) of mpasmx and from the gputils source package (rev: svn 983:985). The mpasmx is included in the MPLAB X.